Sr Principal Product Engineer(ddr Ip)

BETA CAE Systems International AG

Nanjing, China
Onsite
Ddr, lpddr, gddr implementations
Debugging customer silicon issues
Oscilloscopes, berts, protocol exercisers
This is an exceptional opportunity to become part of the dynamic and expanding Product Engineering team within the DDR IP division at Cadence Design Systems

Job Summary

  • This is an exceptional opportunity to become part of the dynamic and expanding Product Engineering team within the DDR IP division at Cadence Design Systems.
  • We are seeking a highly skilled Principal Product Engineer to serve as the primary technical interface for strategic customer engagements, facilitating the deployment of our cutting-edge DDR PHY IP solutions.
  • Join us and be part of a culture that values innovation, collaboration, and customer success.

Matching Summary

This is an exceptional opportunity to become part of the dynamic and expanding Product Engineering team within the DDR IP division at Cadence Design Systems.

Skills & Requirements

Must-have

  • DDR, LPDDR, GDDR implementations
  • Debugging customer silicon issues
  • Oscilloscopes, BERTs, protocol exercisers
  • Signal Integrity and Power Integrity
  • Post Silicon bringup and debug
  • Advanced technology nodes (7nm and below)

Nice-to-have

  • AI-powered tools and assistants
  • Customer success culture
  • Innovative projects
  • Industry-leading experts

Key Requirements

  • M.S. Electrical/Computer Engineering and 10+ years experience or PhD and 5+ years experience
  • Experience with Memory PHY, Memory Controller and DRAM
  • Experience with advanced mixed signal verification and system simulation tools
  • Strong debug and problem-solving skills
  • Experience with lab equipment to reproduce customer failures
  • Familiarity with SI/PI analysis concepts

Work Rights

Not specified

Tailored Resume

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