Senior Staff Digital Design Engineer – Wireline Phys

Marvell

Toronto, Canada
Base: 118,700 - 158,300 cad; bonus/equity: not spe...
Digital design for high-speed phys
Rtl design using verilog/systemverilog
Experience with mixed-signal integration
Marvell’s semiconductor solutions are essential building blocks of data infrastructure

Job Summary

  • Marvell’s semiconductor solutions are essential building blocks of data infrastructure.
  • The role focuses on developing high-performance wireline PHY IPs for advanced SoCs and ASICs.
  • You will have the opportunity to innovate at the boundary of digital, analog, and system design.

Matching Summary

Marvell’s semiconductor solutions are essential building blocks of data infrastructure.

Salary

Base: 118,700 - 158,300 CAD; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • Digital design for high-speed PHYs
  • RTL design using Verilog/SystemVerilog
  • Experience with mixed-signal integration

Nice-to-have

  • Strong problem-solving skills
  • Mentorship and leadership experience
  • Collaboration with cross-disciplinary teams

Key Requirements

  • Master’s degree in Electrical Engineering
  • 7+ years of relevant experience
  • Expertise in timing closure and CDC/RDC techniques

Work Rights

Not specified

Tailored Resume

Cover Letter