Fpga Digital Design & Verification - Intern

Indclutch

San Jose, California, United States
$95k - $100k usd ph
On-site
Systemverilog
Uvm-based verification
Rtl blocks
This internship provides hands-on experience working on industry-leading programmable logic devices, SoC platforms, and verification environments

Job Summary

  • This internship provides hands-on experience working on industry-leading programmable logic devices, SoC platforms, and verification environments.
  • You will collaborate with experienced engineers to design, verify, and validate RTL blocks and system-level features used in next-generation FPGA products.
  • The role is ideal for graduate students eager to grow their expertise in SystemVerilog, UVM-based verification, and digital design methodologies.

Matching Summary

This internship provides hands-on experience working on industry-leading programmable logic devices, SoC platforms, and verification environments.

Salary

$95K - $100K USD

Skills & Requirements

Must-have

  • SystemVerilog
  • UVM-based verification
  • RTL blocks
  • EDA tools
  • Linux-based development environments

Nice-to-have

  • AI/ML accelerators
  • memory interfaces
  • SoC components
  • Python, Perl, Tcl, or C scripting

Key Requirements

  • Graduate Degree in Computer or Electrical Engineering
  • Digital Logic Design and Computer Architecture foundation
  • SystemVerilog and Verilog proficiency
  • UVM knowledge
  • Simulation and verification tools experience
  • Ability to debug simulation issues

Work Rights

Not specified

Tailored Resume

Cover Letter