Design for manufacturability dfm design for reliability dfr
Wafer-level package-level doe execution
Applied Materials is seeking a Process Integration Engineer to lead the development and optimization of advanced packaging processes in Santa Clara, CA. The role emphasizes collaboration, technical leadership, and innovation in semiconductor manufacturing, offering a competitive salary and a supportive company culture
Job Summary
The role involves defining and optimizing advanced packaging process flows including TSV, RDL, bump, hybrid bonding, and die stacking.
Candidates will lead technical projects to integrate packaging needs into product designs ensuring Design for Manufacturability and Design for Reliability.
Applied Materials offers a supportive work culture that encourages learning, development, and career growth while pushing the boundaries of materials science.
Matching Summary
Match Score: 85
Applied Materials is seeking a Process Integration Engineer to lead the development and optimization of advanced packaging processes in Santa Clara, CA. The role emphasizes collaboration, technical leadership, and innovation in semiconductor manufacturing, offering a competitive salary and a supportive company culture.
Salary
Base: $176,000.00 - $242,000.00; Bonus/Equity: Eligible for bonus and stock award program; Benefits: Comprehensive benefits package including health and wellbeing programs
Skills & Requirements
Must-have
TSV RDL bump hybrid bonding die stacking
Design for Manufacturability DFM Design for Reliability DFR