Bachelor's or master's degree in electrical engineering
Strong understanding of cmos device characteristics
Solid foundation in analog and mixed signal design
Infineon Technologies is seeking a Graduate Analog Engineer based in Warwick, UK, to contribute to the design of analog blocks for power management integrated circuits (ICs). The ideal candidate should be graduating between Fall 2025 and Spring 2026 with a degree in Electrical Engineering or a related field, possessing skills in analog and mixed-signal design and familiarity with EDA tools
Job Summary
The role involves designing analog blocks used for power management ICs and performing all aspects of IC analog/mixed signal design from definition to production.
Candidates will utilize EDA design tools like Cadence Virtuoso Custom IC Environment to ensure attention to detail during architecture definition, circuit design, debug, and documentation.
Infineon offers a working environment characterized by trust, openness, respect, and tolerance while driving decarbonization and digitalization through game-changing solutions.
Matching Summary
Match Score: 85
Infineon Technologies is seeking a Graduate Analog Engineer based in Warwick, UK, to contribute to the design of analog blocks for power management integrated circuits (ICs). The ideal candidate should be graduating between Fall 2025 and Spring 2026 with a degree in Electrical Engineering or a related field, possessing skills in analog and mixed-signal design and familiarity with EDA tools.
Salary
Base: $69,040.00 - $86,300.00 (Bachelor's); $86,960.00 - $108,700.00 (Master's); Bonus/Equity: Incentive plan eligible; Benefits: Not specified
Skills & Requirements
Must-have
Bachelor's or Master's degree in Electrical Engineering
Strong understanding of CMOS device characteristics
Solid foundation in analog and mixed signal design
Experience with Cadence Virtuoso Custom IC Environment
Hands-on experience with EDA design tools
Nice-to-have
Exceptional communication and teamwork skills
Keen attention to detail in all design stages
Collaboration with chip lead and application engineers
Key Requirements
Graduating in Fall 2025 or Spring 2026
Proof of legal right to work in the United States
Successful completion of background check and drug test