Asic Rtl Design Engineer

Ericsson

Austin, Texas, United States
Base: dependent on location + qualifications; bonu...
On-site
Bs in electrical or computer engineering
Several years of hands-on rtl design experience
Proficiency in systemverilog, verilog, or vhdl
The ASICs you'll help design are embedded in the infrastructure powering millions of connections every second for global 5G networks

Job Summary

  • The ASICs you'll help design are embedded in the infrastructure powering millions of connections every second for global 5G networks.
  • You will take designs from specification all the way to silicon CMOS circuitry while optimizing circuits on advanced process nodes.
  • Ericsson offers a competitive package including an annual bonus, company-matched 401(k), and up to 16 weeks of paid maternity leave.

Matching Summary

The ASICs you'll help design are embedded in the infrastructure powering millions of connections every second for global 5G networks.

Salary

Base: Dependent on location and qualifications; Bonus: Annual short-term variable compensation plan based on performance; Benefits: Competitive health, dental, 401(k) match, and paid time off

Skills & Requirements

Must-have

  • BS in Electrical or Computer Engineering
  • Several years of hands-on RTL design experience
  • Proficiency in SystemVerilog, Verilog, or VHDL
  • Strong command of C/C++, TCL, and/or Python
  • Deep understanding of clock domain crossing (CDC)
  • Hands-on experience with Synopsys SpyGlass

Nice-to-have

  • Experience with AMBA interfaces like APB and AXI
  • Background in computer architecture or VLSI systems
  • IP knowledge across SerDes, PCIe, ARM subsystems
  • Comfort with Git and Linux environments
  • Curious mindset who chases problems down

Key Requirements

  • BS in Electrical or Computer Engineering
  • Several years of industry RTL design experience
  • Not specified

Work Rights

Not specified

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