Senior Pre-silicon Verification Engineer

Intel

Hillsboro, Oregon, US
Base: $141,910.00-232,190.00 usd; bonus/equity: st...
Hybrid
Uvm systemverilog verification experience
Python perl scripting languages
Pll fll clock generation architecture
The role focuses on ensuring functional correctness of PLL/FLL designs through comprehensive mixed-signal validation activities

Job Summary

  • The role focuses on ensuring functional correctness of PLL/FLL designs through comprehensive mixed-signal validation activities.
  • Candidates will collaborate with architects, RTL developers, and analog teams to define features and resolve complex pre-silicon issues.
  • Intel offers competitive pay, stock bonuses, and access to advanced EDA tools within a data-driven engineering organization.

Matching Summary

The role focuses on ensuring functional correctness of PLL/FLL designs through comprehensive mixed-signal validation activities.

Salary

Base: $141,910.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • UVM SystemVerilog verification experience
  • Python Perl scripting languages
  • PLL FLL clock generation architecture

Nice-to-have

  • Post graduate degree in engineering
  • RTL development and design optimization
  • Strong analytical problem-solving skills

Key Requirements

  • Bachelor's degree in Electronics or Electrical Engineering
  • 3+ years of Design Verification experience
  • Experience with industry-standard EDA tools

Work Rights

Not specified

Tailored Resume

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