Design Verification Engineer, Senior Principal

Marvell

Santa Clara, CA, United States
Base: 182,360 - 273,200; bonus/equity: not specifi...
Design verification implementation
System verilog
Uvm
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world

Job Summary

  • Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
  • As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our chips.
  • Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage.

Matching Summary

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.

Salary

Base: 182,360 - 273,200; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • Design Verification implementation
  • System Verilog
  • UVM
  • scripting languages
  • multi-core SoCs

Nice-to-have

  • detail-oriented
  • fast-paced environment
  • mentorship skills

Key Requirements

  • 10+ years of verification experience
  • BS in Computer Engineering or related field
  • Tape-out of complex SOC

Work Rights

Not specified

Tailored Resume

Cover Letter