Staff Digital Verification Engineer

Alphawave Semi

Not specified; not specified; competitive benefits...
Flexible (specific work mode not specified in the job description)
Bachelor or master degree in computer or electrical engineering
Asic design verification experience with verilog/systemverilog
Applied understanding of uvm and verification techniques
Alphawave Semi is seeking a Staff Digital Verification Engineer to join their innovative team, focusing on high-speed interconnect solutions for various industries, including AI and 5G. The ideal candidate should have a strong background in ASIC design verification, particularly with SystemVerilog and UVM, and be able to drive verification tasks independently

Job Summary

  • The role involves owning the end-to-end verification of new features and optimizations for industry-leading high-speed interconnect solutions tailored for AI and data centers.
  • Candidates will build and enhance testbenches, analyze failures, and facilitate bit-matching between RTL designs and MATLAB system models to ensure compliance.
  • Alphawave Semi offers a flexible work environment with comprehensive health plans, wellness spending accounts, and paid time off options to support employee well-being.

Matching Summary

Match Score: 85

Alphawave Semi is seeking a Staff Digital Verification Engineer to join their innovative team, focusing on high-speed interconnect solutions for various industries, including AI and 5G. The ideal candidate should have a strong background in ASIC design verification, particularly with SystemVerilog and UVM, and be able to drive verification tasks independently.

Salary

Not specified; Not specified; Competitive benefits described as per below

Skills & Requirements

Must-have

  • Bachelor or Master degree in Computer or Electrical Engineering
  • ASIC design verification experience with Verilog/SystemVerilog
  • Applied understanding of UVM and verification techniques
  • Experience with constrained-random verification in SystemVerilog
  • Working knowledge of scripting languages Python Perl C/C++
  • Experience delivering to multiple programs in parallel

Nice-to-have

  • Verification experience in Ethernet PCIe SerDes PHY DSP
  • Formal Verification and Power-aware UPF verification techniques
  • Strong initiative and independently capable of driving tasks
  • Cross-functional collaboration with analog firmware software teams
  • Support post-silicon validation and bring-up activities

Key Requirements

  • Bachelor or Master degree in Computer or Electrical Engineering
  • ASIC design verification experience including coding in Verilog/SystemVerilog
  • Experience with constrained-random verification in SystemVerilog and UVM

Work Rights

Not specified

Tailored Resume

Cover Letter