Design Verification Engineer Iv

Arrow Electronics Inc

San Jose, CA, US
Base: $112,200.00 - $176,000.00; bonus/equity: not...
Onsite
Strong sv/uvm expertise
Axi/noc/ethernet/pcie/ucie switch knowledge
Cpu arm/risc-v with c programming skills
The role involves architecting verification environments for ASIC SoC products ranging from planning to multi-million gate tapeout

Job Summary

  • The role involves architecting verification environments for ASIC SoC products ranging from planning to multi-million gate tapeout.
  • Candidates must develop complex self-checking test benches using constraint random stimulus generation and debug SoC platform test firmware in C/C++.
  • The position offers competitive financial compensation including medical, dental, vision insurance, 401k matching, and tuition reimbursement.

Matching Summary

The role involves architecting verification environments for ASIC SoC products ranging from planning to multi-million gate tapeout.

Salary

Base: $112,200.00 - $176,000.00; Bonus/Equity: Not specified; Benefits: Medical, Dental, Vision, 401k Matching, HSA/HRA Options

Skills & Requirements

Must-have

  • Strong SV/UVM expertise
  • AXI/NOC/Ethernet/PCIe/UCIe Switch knowledge
  • CPU ARM/RISC-V with C programming skills
  • Regression and coverage closure experience
  • ASIC SoC verification environment architecture

Nice-to-have

  • Methodology development participation
  • Leading project teams
  • Training junior staff
  • Script automation for verification
  • Formal verification flow implementation

Key Requirements

  • Minimum of 8 years of related experience
  • 4-year degree or equivalent experience
  • In-depth knowledge of verification methodologies

Work Rights

Not specified

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