Lead Analog Serdes Architect/design Engineer

Intel

Santa Clara, California, US
Base: $220,920.00-311,890.00 usd; bonus/equity: st...
Hybrid
High-speed serial links
Analog cmos/bicmos designs
Low voltage/low power mixed-signal ics
Defining circuit architecture and enabling designs meeting power, and performance for next generation optical interconnects based on system specifications

Job Summary

  • Defining circuit architecture and enabling designs meeting power, and performance for next generation optical interconnects based on system specifications.
  • Specify, architect and design low voltage and low power Mixed-Signal integrated circuits and work collaboratively with digital designers.
  • We offer a total compensation package that ranks among the best in the industry.

Matching Summary

Defining circuit architecture and enabling designs meeting power, and performance for next generation optical interconnects based on system specifications.

Salary

Base: $220,920.00-311,890.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, vacation

Skills & Requirements

Must-have

  • High-speed serial links
  • Analog CMOS/BiCMOS designs
  • Low voltage/low power Mixed-Signal ICs
  • PAM4/NRZ links
  • Full-chip designs, ESDs, verification

Nice-to-have

  • Optical communications familiarity
  • Package/test setup design experience

Key Requirements

  • MS in Electrical Engineering
  • 8+ years of experience
  • SerDes blocks design experience
  • Inductor, TIA, modulator driver design
  • Precision analog circuits design
  • Mixed signal design flow experience

Work Rights

Not specified

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