Full-chip Physical Design Verification Engineer

Tenstorrent

Austin, Texas, United States
Base: $100k - $500k including variable compensatio...
On-site
7-14 years cpu/ip/soc physical verification experience
Expertise in drc lvs erc perc antenna dfm
Proficiency with calibre icv pegasus fc innovus tools
Tenstorrent is seeking a seasoned engineer to drive full-chip signoff and ensure manufacturable silicon across advanced technology nodes

Job Summary

  • Tenstorrent is seeking a seasoned engineer to drive full-chip signoff and ensure manufacturable silicon across advanced technology nodes.
  • The role requires deep expertise in debugging issues using industry-standard PV tools and collaborating with foundry interfaces.
  • Candidates will have opportunities for leadership and mentoring while building scalable physical verification methodologies.

Matching Summary

Tenstorrent is seeking a seasoned engineer to drive full-chip signoff and ensure manufacturable silicon across advanced technology nodes.

Salary

Base: $100k - $500k including variable compensation; Bonus/Equity: Included in total target; Benefits: Highly competitive package not specified

Skills & Requirements

Must-have

  • 7-14 years CPU/IP/SoC physical verification experience
  • Expertise in DRC LVS ERC PERC Antenna DFM
  • Proficiency with Calibre ICV Pegasus FC Innovus tools
  • Strong background in ESD planning padring integration
  • Python and TCL scripting for automation

Nice-to-have

  • Mentoring and technical leadership skills
  • Collaboration across RTL PD CAD teams
  • Passion for solving hard problems in AI
  • Experience with advanced nodes 7nm 5nm 3nm

Key Requirements

  • BS/MS in Electrical/Electronics Engineering
  • 7-14 years hands-on physical verification experience
  • Eligibility for US export license access

Work Rights

Must be eligible for U.S. export license (not EAR Country Groups D:1, E1, or E2)

Tailored Resume

Cover Letter