Sr. Technical Manager, Memory Test And Built-in Self-test (6762)
TSMC Design Technology Canada Inc.
Ottawa, Ontario, Canada
On-site
Memory bist dft architecture control
Develop silicon-proven custom bist solutions
Advanced memory test algorithms
This critical technical leadership role is for a 'Memory Guru' who will drive innovation and solve complex, unprecedented challenges in cutting-edge memory technologies, paramount to TSMC's strategic initiatives
Job Summary
This critical technical leadership role is for a 'Memory Guru' who will drive innovation and solve complex, unprecedented challenges in cutting-edge memory technologies, paramount to TSMC's strategic initiatives.
You will leverage your 10+ years of extensive experience in memory testing and self-testing, with a proven track record in advanced memory test algorithms, defect modeling, and state-of-the-art design-for-test methodologies.
You will play a pivotal role in ensuring the quality and reliability of our memory technologies, collaborating with cross-functional teams in Ottawa and globally to drive innovation and deliver cutting-edge solutions.
Matching Summary
This critical technical leadership role is for a 'Memory Guru' who will drive innovation and solve complex, unprecedented challenges in cutting-edge memory technologies, paramount to TSMC's strategic initiatives.
Skills & Requirements
Must-have
Memory BIST DFT architecture control
Develop silicon-proven custom BIST solutions
Advanced memory test algorithms
Memory defect modeling
State-of-the-art design-for-test methodologies
EDA tools for Memory BIST
Nice-to-have
Visionary problem-solver
Proactive collaboration
Technical mentorship
Global influence
Key Requirements
10+ years of experience in memory test and self-test
Expertise in advanced memory test algorithms and DFT
Significant experience in memory defect and fault modeling