Ip Logic Design Engineer

Inteelabs

Bangalore, India
Not specified; not specified; not specified
Hybrid
Pcie/cxl/ucie protocol architecture
Rtl design and systemverilog coding
High-speed io controller implementation
The role involves designing industry-leading Xeon products through the development of differentiated IPs like Coherent Fabric and Memory Controllers

Job Summary

  • The role involves designing industry-leading Xeon products through the development of differentiated IPs like Coherent Fabric and Memory Controllers.
  • Candidates must possess a unique blend of microarchitectural expertise and hands-on RTL coding skills to implement advanced Digital IO Controllers.
  • The position requires close collaboration with verification teams and cross-functional groups including physical design, software, and firmware.

Matching Summary

The role involves designing industry-leading Xeon products through the development of differentiated IPs like Coherent Fabric and Memory Controllers.

Salary

Not specified; Not specified; Not specified

Skills & Requirements

Must-have

  • PCIe/CXL/UCIe protocol architecture
  • RTL design and SystemVerilog coding
  • High-speed IO controller implementation
  • Memory coherency protocol design
  • STA and formal equivalence flows

Nice-to-have

  • Workload modeling and optimization
  • Mentoring junior engineers
  • Cross-functional collaboration skills
  • Debugging pre-silicon validation issues

Key Requirements

  • Bachelor's or Master's in Engineering
  • 8-12+ years experience (BS) or 7-11+ years (MS)
  • Experience with FE RTL2Netlist methodology
  • Proficiency in STA and Formal Equivalence

Work Rights

Not specified

Tailored Resume

Cover Letter