Staff Engineer, Design Verification Engineering

Analog Devices

7+ years digital verification experience
Expert-level system verilog and uvm knowledge
Ai enabled dv development skills
Analog Devices is expanding its team to architect, design, and verify Foundational Security Solutions for internal and external customers

Job Summary

  • Analog Devices is expanding its team to architect, design, and verify Foundational Security Solutions for internal and external customers.
  • The role requires developing UVM test benches to verify blocks, subsystems, and SOC level IP while achieving high coverage against specifications.
  • Candidates will lead technical mentorship within the DV team and proactively communicate status using Agile development practices.

Matching Summary

Analog Devices is expanding its team to architect, design, and verify Foundational Security Solutions for internal and external customers.

Skills & Requirements

Must-have

  • 7+ years digital verification experience
  • Expert-level System Verilog and UVM knowledge
  • AI enabled DV development skills
  • Experience with Legacy and Post Quantum crypto
  • FPGA and HW emulation platform experience

Nice-to-have

  • Python, SystemC, C/C++ language proficiency
  • Mentoring local DV team members
  • Agile development practice experience
  • Cross-functional product team leadership
  • Reuse mindset in verification environments

Key Requirements

  • BSEE or MSEE degree required
  • 7+ years of digital verification experience
  • US citizenship or permanent resident status required for export control

Work Rights

Must be US Citizen, US Permanent Resident, or protected individual

Tailored Resume

Cover Letter