Staff Silicon Design Engineer - RTL

XILINX ASIA PACIFIC PTE. LTD.

Singapore
Not specified
Rtl design with verilog/systemverilog
Asic or fpga tapeout experience
Front-end digital design flow knowledge
Xilinx Asia Pacific Pte. Ltd. is seeking a talented Staff Silicon Design Engineer specializing in RTL to join their SerDes Technology group in Singapore. The role involves comprehensive digital design tasks, including RTL design, functional verification, and post-silicon validation, targeting candidates with experience in ASIC or digital IC design

Job Summary

  • The role involves developing SerDes/Transceiver designs across the full FPGA/ASIC digital design flow from specification to hardware validation.
  • Candidates will execute digital design work on leading edge technology nodes while collaborating with system architects and project managers.
  • The position requires strong problem-solving skills and a willingness to learn new domains such as SerDes/transceiver logic.

Matching Summary

Match Score: 85

Xilinx Asia Pacific Pte. Ltd. is seeking a talented Staff Silicon Design Engineer specializing in RTL to join their SerDes Technology group in Singapore. The role involves comprehensive digital design tasks, including RTL design, functional verification, and post-silicon validation, targeting candidates with experience in ASIC or digital IC design.

Skills & Requirements

Must-have

  • RTL design with Verilog/SystemVerilog
  • ASIC or FPGA tapeout experience
  • Front-end digital design flow knowledge

Nice-to-have

  • DFT implementation and verification skills
  • SystemVerilog and UVM familiarity
  • High-performance digital design background

Key Requirements

  • Bachelor or Masters Degree in Electronic Engineering
  • Hands-on involvement in RTL development for complex blocks
  • Experience contributing to ASIC or FPGA tapeouts

Work Rights

Not specified

Tailored Resume

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