Logic Design & Verification Engineer

Cisco

Caesarea,
Rtl design experience
Familiarity with uvm
Micro-architecture specifications
Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development

Job Summary

  • Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development.
  • Our engineers cover the full spectrum of chip design, pushing the boundaries of what’s possible.
  • We work as a team, collaborating with empathy to make really big things happen on a global scale.

Matching Summary

Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development.

Skills & Requirements

Must-have

  • RTL design experience
  • Familiarity with UVM
  • Micro-architecture specifications

Nice-to-have

  • Experience with MATLAB simulations
  • Familiarity with mixed-signal systems
  • Knowledge of Clock Domain Crossing

Key Requirements

  • B.Sc./M.Sc. in Electrical Engineering
  • 3+ years of experience in a relevant field

Work Rights

Not specified

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