Design Verification Manager

Alphawave Semi

Base: $225,000 to $250,000 annually; bonus/equity:...
**
15+ years asic/soc verification experience
Arm architecture and amba protocols expertise
Uvm systemverilog testbench development
** Alphawave Semi is seeking a Design Verification Manager to lead verification efforts for ARM-based multi-core CPU designs. The ideal candidate should have extensive experience in ASIC verification, leadership skills, and a solid understanding of verification methodologies. This position offers competitive compensation and opportunities for professional growth in a dynamic environment. **

Job Summary

  • Alphawave Semi is seeking an experienced manager to lead verification efforts for cutting-edge ARM multi-core CPU based SoC designs.
  • The role involves driving pre-silicon verification, managing cross-functional collaboration, and ensuring comprehensive validation closure for mission-critical data communication technologies.
  • Employees are offered a competitive base salary ranging from $225,000 to $250,000 annually along with comprehensive health benefits and flexible time off options.

Matching Summary

Match Score: 75

** Alphawave Semi is seeking a Design Verification Manager to lead verification efforts for ARM-based multi-core CPU designs. The ideal candidate should have extensive experience in ASIC verification, leadership skills, and a solid understanding of verification methodologies. This position offers competitive compensation and opportunities for professional growth in a dynamic environment. **

Salary

Base: $225,000 to $250,000 annually; Bonus/Equity: Short-term incentive program and Employee Stock Purchase Plan (ESPP); Benefits: Comprehensive health plans, Wellness Spending Account, Paid Vacation, and Paid Holidays

Skills & Requirements

Must-have

  • 15+ years ASIC/SoC verification experience
  • ARM architecture and AMBA protocols expertise
  • UVM SystemVerilog testbench development
  • Managerial leadership in verification teams
  • Pre-silicon verification and emulation support

Nice-to-have

  • Experience with high-performance computing SoCs
  • Knowledge of security verification and cache coherency
  • Familiarity with post-silicon validation processes
  • Hands-on experience with C/C++ Python scripting
  • Prior tapeout-focused environment experience

Key Requirements

  • Bachelor's or Master's degree in Electrical or Computer Engineering
  • Minimum 15 years of ASIC/SoC verification experience
  • At least 3 years in a managerial leadership role
  • Expertise in Excelium VCS Questa simulators
  • Proficiency in Formal Verification and Static Timing Analysis

Work Rights

Not specified

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