We are seeking a Senior Mixed Signal Verification Engineer specializing in clock generator IP verification to ensure functional correctness of PLL/FLL designs
Job Summary
We are seeking a Senior Mixed Signal Verification Engineer specializing in clock generator IP verification to ensure functional correctness of PLL/FLL designs.
This role combines digital verification expertise with mixed-signal validation capabilities, requiring collaboration across architecture, RTL development, and analog design teams to deliver high-quality clock generation solutions.
We offer a total compensation package that ranks among the best in the industry, including competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
Matching Summary
We are seeking a Senior Mixed Signal Verification Engineer specializing in clock generator IP verification to ensure functional correctness of PLL/FLL designs.