Low Power Asic Engineer - New College Grad 2026

NVIDIA

Base: 100,000 usd - 166,750 usd (level 1); 116,000...
Not specified
Low power design techniques
Processor architecture understanding
Incisive low-power or synopsys vcs nlp
NVIDIA is seeking a Low Power ASIC Engineer for new college graduates in 2026, focusing on developing energy-efficient GPU and SOC architectures. The role involves collaborating with various teams on power management solutions and requires knowledge of low power design techniques, processor architecture, and proficiency in relevant programming languages

Job Summary

  • Working very closely with Low Power Architecture, Design, and Software teams to understand next generation features.
  • Responsible for architecting/developing testbench, infrastructure, and testplans to verify various power management solutions for NVIDIA products.
  • You will have the opportunity bring creative ideas that help improve power-aware DV methodologies, as well as influence EDA vendors to improve our simulation and debug efficiencies.

Matching Summary

Match Score: 85

NVIDIA is seeking a Low Power ASIC Engineer for new college graduates in 2026, focusing on developing energy-efficient GPU and SOC architectures. The role involves collaborating with various teams on power management solutions and requires knowledge of low power design techniques, processor architecture, and proficiency in relevant programming languages.

Salary

Base: 100,000 USD - 166,750 USD (Level 1); 116,000 USD - 189,750 USD (Level 2); Bonus/Equity: equity; Benefits: benefits

Skills & Requirements

Must-have

  • Low power design techniques
  • Processor architecture understanding
  • Incisive Low-Power or Synopsys VCS NLP
  • Verilog, SystemVerilog, UVM
  • Low Power DV team

Nice-to-have

  • Creative and autonomous
  • Love a challenge
  • Deep learning knowledge
  • Python or PERL scripting
  • C or C++ knowledge

Key Requirements

  • BS, MS or PhD in Electrical or Computer Engineering
  • Understanding of low power design techniques
  • Experience with Incisive Low-Power or Synopsys VCS NLP
  • Strong debug skills and experience with Verdi
  • Fluent in Verilog, SystemVerilog, and understanding of UVM

Work Rights

Not specified

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