Senior Design Verification Engineer- Mixed Signal Ip

Intel Retiree Medical Plan Trust

Folsom, California, US
Base: $164,470.00-311,890.00 usd; bonus/equity: st...
Hybrid
Mixed signal logic verification
Analog behavioral modeling
Ip verification plans
Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements

Job Summary

  • Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements.
  • Collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Matching Summary

Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements.

Salary

Base: $164,470.00-311,890.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, and vacation

Skills & Requirements

Must-have

  • Mixed signal logic verification
  • Analog behavioral modeling
  • IP verification plans
  • System Verilog
  • OVM/UVM
  • Test bench development

Nice-to-have

  • DDRPHY validation
  • Python/Perl scripting
  • Formal Property Verification
  • Version control systems

Key Requirements

  • BS degree + 8 years experience
  • MS degree + 6 years experience
  • PhD degree + 4 years experience
  • Design verification experience
  • System Verilog experience
  • OVM/UVM experience

Work Rights

Not specified

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