Senior Engineer, Physical Design Engineering

Analog Devices

Digital place and route experience
Pnr signoff for high speed soc designs
Static timing analysis expertise
Analog Devices is seeking a Senior/Lead PD Engineer to develop complex mixed-signal SoCs in cutting-edge process nodes

Job Summary

  • Analog Devices is seeking a Senior/Lead PD Engineer to develop complex mixed-signal SoCs in cutting-edge process nodes.
  • The role requires hands-on implementation of physical design flows including floor planning, power planning, and clock tree synthesis.
  • Candidates must demonstrate strong expertise in static timing analysis and constraint development to ensure successful tapeout.

Matching Summary

Analog Devices is seeking a Senior/Lead PD Engineer to develop complex mixed-signal SoCs in cutting-edge process nodes.

Skills & Requirements

Must-have

  • Digital place and route experience
  • PnR signoff for high speed SoC designs
  • Static timing analysis expertise
  • Floor planning and clock tree synthesis
  • TCL and Perl scripting proficiency

Nice-to-have

  • Understanding of UDSM device aspects
  • Interconnect and circuit knowledge
  • Flow innovation for QoR targets

Key Requirements

  • BTech/MTech degree in Electrical/Electronic
  • 4-8 years of Digital place and route experience
  • Experience with 22 nm, 16 nm, or 7 nm technologies

Work Rights

May require export licensing review; US Citizens, PRs, or protected individuals exempt

Tailored Resume

Cover Letter