Ip Logic Design Engineer

Intel Retiree Medical Plan Trust

Bangalore, India
Hybrid
Pcie cxl ucie protocol architecture
Rtl design and systemverilog coding
High-speed io controller implementation
The role involves designing industry-leading x86 core and differentiated IPs to enhance product performance in data center and AI platforms

Job Summary

  • The role involves designing industry-leading x86 core and differentiated IPs to enhance product performance in data center and AI platforms.
  • Candidates must possess a unique blend of microarchitectural expertise and hands-on RTL coding skills to implement critical PCIe/UCIe components.
  • The position requires collaborating with cross-functional teams including physical design, software, and firmware to ensure seamless system integration.

Matching Summary

The role involves designing industry-leading x86 core and differentiated IPs to enhance product performance in data center and AI platforms.

Skills & Requirements

Must-have

  • PCIe CXL UCIe protocol architecture
  • RTL design and SystemVerilog coding
  • High-speed IO controller implementation
  • Memory coherency protocol design
  • STA and formal equivalence verification

Nice-to-have

  • Workload modeling and performance optimization
  • Mentoring junior engineers
  • Cross-functional collaboration skills
  • Debugging pre-silicon validation issues

Key Requirements

  • Bachelor's or Master's degree in Engineering
  • 8-12+ years experience (BS) or 7-11+ years (MS)
  • Experience with FE RTL2Netlist methodology flows
  • Proficiency in STA and Formal Equivalence tools

Work Rights

Not specified

Tailored Resume

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