Sr. Asic Design Engineer (starshield)

SpaceX

Palo Alto, CA, United States
Base: $170,000.00 - $235,000.00/py; bonus/equity: ...
On-site
Rtl implementation
Fpga/asic development
Verilog/system verilog
As an ASIC Design Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security

Job Summary

  • As an ASIC Design Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security.
  • In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe.
  • You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan.

Matching Summary

As an ASIC Design Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security.

Salary

Base: $170,000.00 - $235,000.00/per year; Bonus/Equity: Long-term incentives (stock, options, cash awards), discretionary bonuses, ESPP; Benefits: Medical, vision, dental, 401(k), disability, life insurance, paid parental leave, paid vacation, paid holidays

Skills & Requirements

Must-have

  • RTL implementation
  • FPGA/ASIC development
  • Verilog/System Verilog
  • timing constraints
  • silicon bring-up and validation

Nice-to-have

  • solving clock domain crossings
  • power optimization
  • multicore CPU subsystem design
  • high speed and low power design
  • can-do attitude

Key Requirements

  • Bachelor’s degree in EE, CE, or CS
  • 5+ years of experience
  • Active TS-SCI clearance may be required
  • U.S. citizen or national, lawful permanent resident, Refugee, or Asylee

Work Rights

Must be U.S. citizen, permanent resident, refugee, or asylee

Tailored Resume

Cover Letter