Director Of Dv For Mem/pcie Coe

Marvell

Base: $185,390 - $277,700 py; bonus/equity: not sp...
Not specified
Uvm-based verification environment scaling
Pcie and memory technology expertise
Soc verification using system verilog
Marvell is seeking a Director of Design Verification for their PCIe and Memory Center of Excellence, responsible for leading verification efforts across multiple SoC products. The ideal candidate will have extensive experience in SOC verification, UVM methodology, and strong management skills to guide distributed teams

Job Summary

  • The role involves defining scalable UVM-based verification environments to drive reuse across IP and programs while ensuring comprehensive functional and code coverage.
  • Candidates will manage globally distributed Design Verification teams and collaborate with architecture and design groups to reduce downstream verification risk.
  • Marvell offers exceptional benefits including an employee stock purchase plan, family support programs, and robust mental health resources.

Matching Summary

Match Score: 85

Marvell is seeking a Director of Design Verification for their PCIe and Memory Center of Excellence, responsible for leading verification efforts across multiple SoC products. The ideal candidate will have extensive experience in SOC verification, UVM methodology, and strong management skills to guide distributed teams.

Salary

Base: $185,390 - $277,700 per annum; Bonus/Equity: Not specified; Benefits: Employee stock purchase plan, family support, mental health resources

Skills & Requirements

Must-have

  • UVM-based verification environment scaling
  • PCIe and Memory technology expertise
  • SOC verification using System Verilog
  • Hierarchical test bench architecture design
  • Constrained random method implementation
  • Python or Perl scripting proficiency

Nice-to-have

  • Strong cross-program technical leadership
  • Proactive problem-solving mindset
  • Ecosystem partner engagement experience
  • Transparent communication with stakeholders

Key Requirements

  • BS/MS/PhD in Computer Science or Engineering
  • 10-15 years of relevant professional experience
  • Proven track record leading distributed diverse teams
  • Deep understanding of DDR, LPDDR, and HBM technologies
  • Eligibility to access export-controlled information

Work Rights

Must be eligible to access export-controlled information (US citizens, lawful permanent residents, or protected individuals)

Tailored Resume

Cover Letter