Sr. Principal Design Engineer

BETA CAE Systems International AG

Hyderabad, India
High-speed analog/mixed-signal circuits
Die-to-die interconnects
Ucie standard
Drive the design and delivery of high-speed interface IPs, with a strong emphasis on Die-to-Die (D2D) interconnects based on the UCIe standard and advanced package technologies

Job Summary

  • Drive the design and delivery of high-speed interface IPs, with a strong emphasis on Die-to-Die (D2D) interconnects based on the UCIe standard and advanced package technologies.
  • Own analog blocks for high-speed interfaces such as clocking, TX/RX front-ends, termination schemes, biasing, and equalization support circuits.
  • Collaborate with AMS verification, digital, and system teams to enable full-chip integration and validation, and participate in silicon bring-up, debug, and characterization.

Matching Summary

Drive the design and delivery of high-speed interface IPs, with a strong emphasis on Die-to-Die (D2D) interconnects based on the UCIe standard and advanced package technologies.

Skills & Requirements

Must-have

  • High-speed analog/mixed-signal circuits
  • Die-to-Die interconnects
  • UCIe standard
  • Advanced packaging technologies
  • Schematic design and simulation
  • Signal integrity and noise analysis

Nice-to-have

  • Mentoring junior engineers
  • Leading technical discussions
  • Power integrity and thermal considerations
  • Package-aware design flows

Key Requirements

  • 12+ years analog/mixed-signal IC design experience
  • Bachelor's or Master's degree
  • Experience with high-speed interfaces
  • Understanding of UCIe standard
  • Experience with advanced packaging

Work Rights

Not specified

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