Staff Verification Engineer

Alphawave Semi

Israel
Systemverilog uvm
Python
Pre-silicon verification experience
Develop block and cluster level test environment, including test-plan and coverage

Job Summary

  • Develop block and cluster level test environment, including test-plan and coverage.
  • Work closely with Design and Algorithm teams.
  • We have an exciting opportunity for an experienced Pre-Silicon Verification engineer for several advanced high-speed products.

Matching Summary

Develop block and cluster level test environment, including test-plan and coverage.

Skills & Requirements

Must-have

  • SystemVerilog UVM
  • Python
  • pre-silicon verification experience

Nice-to-have

  • networking products experience
  • elite and growing team
  • flexible work environment

Key Requirements

  • 5 years of pre-silicon verification experience
  • BS+ in Electrical Engineering or Computer Science
  • Formal verification experience – advantage
  • Very good English skills

Work Rights

Not specified

Tailored Resume

Cover Letter