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Renesas is seeking a Graduate Verification Engineer for their Swindon office, focusing on verification planning, mixed-signal IC design, and collaboration with international teams. The role requires basic experience in AMS verification and proficiency in Verilog or SystemVerilog, along with strong communication skills.
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Job Summary
Renesas is seeking an Associate HW Engineer to join their Swindon office for verification planning and test case development.
The role requires collaboration with global teams across the US, India, and UK to achieve first-pass silicon success.
Candidates must be comfortable working in a Unix/Linux environment and possess fundamental knowledge of analog and digital design flows.
Matching Summary
Match Score: 75
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Renesas is seeking a Graduate Verification Engineer for their Swindon office, focusing on verification planning, mixed-signal IC design, and collaboration with international teams. The role requires basic experience in AMS verification and proficiency in Verilog or SystemVerilog, along with strong communication skills.
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Skills & Requirements
Must-have
Verilog SystemVerilog or Verilog-AMS proficiency
Fundamental understanding of analog circuits
Digital design flow and mixed-signal integration
Simulation debugging and waveform analysis skills
Unix/Linux environment and shell scripting
Nice-to-have
Basic knowledge of PMICs and DC-DC converters
Experience with AI-based engineering tools
Python scripting capabilities
Proactive communication in multi-cultural teams
Ability to deliver under tight schedule pressure
Key Requirements
0–1 years experience in AMS verification or mixed-signal IC design
Proficiency in Verilog, SystemVerilog, or Verilog-AMS
Familiarity with simulation debugging and schematic analysis