System And Architecture Engineer

Altera

Jerusalem, Israel
Serdes and phy design expertise
Dsp algorithm development
System modeling tools (matlab, simulink)
Altera is driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure with cutting-edge FPGA, CPLD, and IP technologies

Job Summary

  • Altera is driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure with cutting-edge FPGA, CPLD, and IP technologies.
  • The System & Architecture Engineer will define and develop next-generation high-speed SerDes and PHY technology, modeling and optimizing system architectures.
  • This role involves researching and developing DSP algorithms, running simulations, analyzing performance, managing risks, and collaborating across development teams, product managers, and stakeholders.

Matching Summary

Altera is driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure with cutting-edge FPGA, CPLD, and IP technologies.

Skills & Requirements

Must-have

  • SerDes and PHY design expertise
  • DSP algorithm development
  • System modeling tools (Matlab, Simulink)
  • Communication standards knowledge
  • Serial link optimization

Nice-to-have

  • Analog design familiarity
  • RTL development familiarity
  • Firmware development familiarity
  • Post-silicon validation experience

Key Requirements

  • 8+ years of experience in FPGA/ASIC architecture
  • B.Sc. or M.Sc. in Electrical Engineering
  • Proven expertise in SerDes and PHY design
  • Hands-on experience with system modeling tools
  • Strong understanding of communication standards

Work Rights

Not specified

Tailored Resume

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