Principal Hls Engineer

alcon.mx

Goleta, CA, US
$115,500.00 - $192,500.00 annual; not specified; n...
Fpga design using hls
Image processing pipeline development
Vhdl and verilog design
Develop image processing pipelines on FPGA using High Level Synthesis (HLS) and translate algorithms from C/Matlab to FPGA fabric

Job Summary

  • Develop image processing pipelines on FPGA using High Level Synthesis (HLS) and translate algorithms from C/Matlab to FPGA fabric.
  • Design FPGA logic using VHDL and Verilog, write testbenches, close timing, and interface FPGA to external hardware peripherals.
  • Program embedded processors using C language, test embedded systems, and develop firmware following Agile Design Methodology.

Matching Summary

Develop image processing pipelines on FPGA using High Level Synthesis (HLS) and translate algorithms from C/Matlab to FPGA fabric.

Salary

$115,500.00 - $192,500.00 Annual; Not specified; Not specified

Skills & Requirements

Must-have

  • FPGA design using HLS
  • Image processing pipeline development
  • VHDL and Verilog design
  • Embedded C programming
  • Agile Design Methodology
  • Version control (Git)
  • Host computer test tool development

Nice-to-have

  • Object-oriented programming with C++
  • Image sensor concepts
  • Basic ISP knowledge
  • Reading schematics and PCB layout
  • Troubleshooting PCBA level issues

Key Requirements

  • Bachelor’s Degree or Equivalent Experience
  • 5 Years of Relevant Experience
  • Fluent English communication

Work Rights

Not specified

Sponsorship: available

Tailored Resume

Cover Letter