Senior Principal Software Engineer - Accelerated Verification Ip

Cadence

Base: $154,000 to $286,000 (california); bonus/equ...
Hybrid
Pcie protocol functionality implementation
Cxl virtual bridge development
Systemverilog or verilog experience
The role involves designing and implementing protocol solutions for high-performance verification on Palladium and Protium platforms

Job Summary

  • The role involves designing and implementing protocol solutions for high-performance verification on Palladium and Protium platforms.
  • Engineers will work across hardware and software boundaries to develop debug, trace, and analysis capabilities for complex SoCs.
  • Candidates are eligible for incentive compensation including bonus, equity, and a comprehensive benefits package.

Matching Summary

The role involves designing and implementing protocol solutions for high-performance verification on Palladium and Protium platforms.

Salary

Base: $154,000 to $286,000 (California); Bonus/Equity: Eligible for incentive compensation; Benefits: Paid vacation, 401(k) match, medical/dental/vision

Skills & Requirements

Must-have

  • PCIe protocol functionality implementation
  • CXL Virtual Bridge development
  • SystemVerilog or Verilog experience
  • Hardware-software co-simulation skills
  • Debugging with waveforms and logs

Nice-to-have

  • Emulation platform familiarity
  • Customer enablement experience
  • Protocol compliance validation
  • High-performance system verification
  • Cross-functional collaboration

Key Requirements

  • BS degree with 10+ years experience OR MS with 7+ years OR PhD with 5+ years
  • Strong fundamentals in digital design and computer architecture
  • Experience with C/C++ programming

Work Rights

Not specified

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