Sr. Hardware Design Engineer (remote)

Fortifyiq

Remote
Fully remote
Rtl development and integration
Digital architecture design
Simulation tools experience
Fortifyiq is seeking a senior-level Hardware Design Engineer to lead complex ASIC and FPGA development projects in a remote environment. The ideal candidate will have extensive experience in hardware architecture, RTL development, and mentoring junior engineers

Job Summary

  • Define HW architecture and evaluate design trade-offs for performance, area, and power.
  • Lead RTL development, integration, and verification throughout the design cycle.
  • Provide design-in and bring-up support, including technical expertise for customer-facing projects.

Matching Summary

Match Score: 85

Fortifyiq is seeking a senior-level Hardware Design Engineer to lead complex ASIC and FPGA development projects in a remote environment. The ideal candidate will have extensive experience in hardware architecture, RTL development, and mentoring junior engineers.

Skills & Requirements

Must-have

  • RTL development and integration
  • digital architecture design
  • simulation tools experience
  • scripting for automation
  • ASIC or FPGA design
  • timing closure expertise

Nice-to-have

  • UVM-based verification environments
  • high-speed memory technologies
  • AMBA AXI or CHI protocols

Key Requirements

  • 10+ years of relevant experience
  • BSEE or MSEE degree
  • SystemVerilog for RTL design
  • ASIC synthesis, timing constraints, CDC/RDC methodologies

Work Rights

Not specified

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