Design Engineer

Marvell

Ho Chi Minh, Vietnam
Rtl design with verilog
On-chip bus protocols knowledge
Design architecture analysis
Marvell’s semiconductor solutions are essential building blocks of data infrastructure

Job Summary

  • Marvell’s semiconductor solutions are essential building blocks of data infrastructure.
  • You will design high-performance AI silicon and critical high-speed interface IP designs.
  • The team participates in circuit architecture, RTL implementation, and silicon validation.

Matching Summary

Marvell’s semiconductor solutions are essential building blocks of data infrastructure.

Skills & Requirements

Must-have

  • RTL design with Verilog
  • On-Chip bus protocols knowledge
  • Design architecture analysis

Nice-to-have

  • Knowledge in PCIe and NVMe
  • Basic understanding of UVM
  • Scripting knowledge in Python

Key Requirements

  • Minimum BSEE plus 2-5 years of design experience
  • Basic understanding of scripting/programming language
  • Performing Lint and Timing closure analysis

Work Rights

Not specified

Tailored Resume

Cover Letter