Sr Dft Engineer (einfochips Inc)

Arrow Electronics Inc

San Jose, California, US
Competitive financial compensation; various compen...
Onsite
Strong understanding of industry standards in dft
Expertise in debugging dft issues and coverage analysis
Proficiency in siemens-tessent and synopsys tools
The role involves designing and implementing DFT strategies including scan, MBIST, and ATPG at both block and SoC levels

Job Summary

  • The role involves designing and implementing DFT strategies including scan, MBIST, and ATPG at both block and SoC levels.
  • Candidates must possess expertise in debugging DFT issues and utilizing tools like Siemens-Tessent and Synopsys for implementation.
  • The position offers competitive financial compensation, a solid benefits package, and opportunities for growth within Arrow Electronics.

Matching Summary

The role involves designing and implementing DFT strategies including scan, MBIST, and ATPG at both block and SoC levels.

Salary

Competitive financial compensation; Various compensation plans included; Solid benefits package with 401k matching

Skills & Requirements

Must-have

  • Strong understanding of industry standards in DFT
  • Expertise in debugging DFT issues and coverage analysis
  • Proficiency in Siemens-Tessent and Synopsys tools
  • Efficient scripting skills using TCL for automation

Nice-to-have

  • Ability to conduct experiments during silicon debug
  • Collaboration with test engineers for vector bring-up
  • Experience developing DFT specifications for complex designs

Key Requirements

  • Proven experience in developing DFT architectures
  • Expertise in JTAG and MBIST implementations
  • Must be able to travel to client office locations

Work Rights

Not specified

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