$131,285 to $190,108; bonus/equity: discretionary ...
Systemverilog and uvm expertise
Test planning and strategy
Debugging mastery
As a Staff Design Verification Engineer, you will provide technical leadership in developing verification strategies for our most complex analog and mixed-signal designs
Job Summary
As a Staff Design Verification Engineer, you will provide technical leadership in developing verification strategies for our most complex analog and mixed-signal designs.
This senior position involves significant influence on verification methodology adoption and technical decisions that impact crucial organizational objectives.
At Analog Devices, you'll be part of a collaborative and innovative team that's shaping the future of technology, offering a supportive environment focused on professional growth.
Matching Summary
As a Staff Design Verification Engineer, you will provide technical leadership in developing verification strategies for our most complex analog and mixed-signal designs.
Salary
$131,285 to $190,108; Bonus/Equity: discretionary performance-based bonus; Benefits: medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time
Skills & Requirements
Must-have
SystemVerilog and UVM Expertise
Test Planning and Strategy
Debugging Mastery
EDA Tool Proficiency
Scripting and Automation
Nice-to-have
Technical leadership
Customer and industry interactions
Verification methodology adoption
Collaborative and innovative team
Key Requirements
7-10+ years of relevant digital design verification experience
MS in Electrical Engineering, Computer Engineering, or related field
Mixed-Signal Verification experience
Work Rights
Export licensing review process may apply for non-US citizens, permanent residents, and protected individuals