Base: $141,900.00-$189,200.00; bonus/equity: not s...
Verilog/systemverilog rtl design
Fpga development with xilinx and intel tools
High-speed protocol expertise pcie usb ethernet
Teledyne LeCroy is a global leader in protocol analysis and test solutions for high-speed serial data communications
Job Summary
Teledyne LeCroy is a global leader in protocol analysis and test solutions for high-speed serial data communications.
The Staff Logic Design Engineer will architect and implement digital logic for FPGA-based protocol analyzers supporting PCIe, USB, Ethernet, and other protocols in real time.
The role involves collaboration across hardware, firmware, and software teams in a fast-paced, innovation-driven environment located in Milpitas, CA with minimal travel.
Matching Summary
Teledyne LeCroy is a global leader in protocol analysis and test solutions for high-speed serial data communications.
Salary
Base: $141,900.00-$189,200.00; Bonus/Equity: Not specified; Benefits: Not specified
Skills & Requirements
Must-have
Verilog/SystemVerilog RTL design
FPGA development with Xilinx and Intel tools
High-speed protocol expertise PCIe USB Ethernet
SystemVerilog/UVM testbench verification
Timing closure and resource optimization
Cross-functional hardware and software collaboration
Nice-to-have
Experience with protocol analyzers and packet capture
Familiarity with AXI interconnects and memory controllers
Scripting experience in Python and Tcl
Hardware/software co-design and embedded firmware interaction