Soc Physical Design Clocking Engineer

Intel Corporation

Bangalore, India
Hybrid
Soc clock architecture
Clock distribution
Clocking ips pll, dll
Candidate will be part of product pathfinding, clock distribution and driving overall SoC clock implementation and Sign off

Job Summary

  • Candidate will be part of product pathfinding, clock distribution and driving overall SoC clock implementation and Sign off.
  • Creates scalable flows for clocking infrastructure for better performance and power in the design.
  • Working with Platform, package, IP and SoC design team for driving best in class clocking solutions.

Matching Summary

Candidate will be part of product pathfinding, clock distribution and driving overall SoC clock implementation and Sign off.

Skills & Requirements

Must-have

  • SoC Clock Architecture
  • clock distribution
  • clocking IPs PLL, DLL
  • spice, clock jitter simulations
  • scalable flows for clocking infrastructure
  • Perl, TCL Scripting Skills

Nice-to-have

  • Physical design knowledge
  • SoC timing analysis knowledge
  • effective communication with global teams

Key Requirements

  • Bachelors (B.Tech) or Masters (M.Tech)
  • At least 10+ years of experience
  • Hands-on experience with Synopsys, cadence APR/Clock implementation tools
  • Proficient in scripting languages (Tcl, Perl, Python)

Work Rights

Not specified

Tailored Resume

Cover Letter