Asic/fpga Verification Engineer (experienced, Lead, Or Senior)

Boeing Aerostructures Australia

El Segundo, CA, USA
Experienced (level 3): $119,850 - $162,150; lead (...
On-site
Uvm & system verilog
Object-oriented programming principles
Functional coverage models
Boeing Aerostructures Australia is seeking experienced ASIC/FPGA Verification Engineers for its Electronic Products team, with positions available in El Segundo, Huntington Beach, or Fairfax, VA. Candidates are expected to have a strong background in ASIC/FPGA verification processes and work onsite to verify advanced digital ICs and SoCs for critical programs across various domains

Job Summary

  • Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog.
  • Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming principles such as Inheritance and Polymorphism, while utilizing UVM to build drivers, monitors, predictors, and scoreboards.
  • Collaborate with cross-functional teams to ensure that verification strategies align with overall project goals and timelines.

Matching Summary

Match Score: 85

Boeing Aerostructures Australia is seeking experienced ASIC/FPGA Verification Engineers for its Electronic Products team, with positions available in El Segundo, Huntington Beach, or Fairfax, VA. Candidates are expected to have a strong background in ASIC/FPGA verification processes and work onsite to verify advanced digital ICs and SoCs for critical programs across various domains.

Salary

Experienced (Level 3): $119,850 - $162,150; Lead (Level 4): $126,650 - $171,350 / $146,200 - $197,800; Senior (Level 5): $176,800 - $239,200

Skills & Requirements

Must-have

  • UVM & System Verilog
  • Object-Oriented Programming principles
  • Functional Coverage Models
  • Code Coverage analysis
  • waveform debug tools
  • Linux Environments
  • Revision Control Systems

Nice-to-have

  • hardware emulators
  • high-speed Serdes interfaces
  • space-based design techniques
  • radiation mitigation
  • 1st pass success with ASIC designs

Key Requirements

  • Bachelor of Science degree in Engineering, Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent
  • 5+ years of ASIC/FPGA verification experience
  • SystemVerilog/UVM architectural framework
  • SystemVerilog and SystemVerilog Assertions proficiency
  • Test plan implementation experience
  • Object-Oriented Programming principles
  • Self-checking and reusable testbenches
  • Functional Coverage Models and Code Coverage closure
  • ASIC/FPGA level specifications collaboration
  • US Security Clearance required

Work Rights

US Citizenship required

Tailored Resume

Cover Letter