Adce Packaging Design Architect

Inteelabs

Phoenix, Arizona, US
Base: $190,610.00-269,100.00 usd; bonus/equity: st...
Hybrid
Package and disaggregation architecture
Si, package and board co-design
Silicon bridge/interposer architecture
Responsible for defining Package and Disaggregation Architecture across Intel's product portfolios as part of the Advanced Design Group

Job Summary

  • Responsible for defining Package and Disaggregation Architecture across Intel's product portfolios as part of the Advanced Design Group.
  • Will work closely with Intel and external customers on advanced design nodes to establish design flows for advanced package architecture.
  • We offer a total compensation package that ranks among the best in the industry.

Matching Summary

Responsible for defining Package and Disaggregation Architecture across Intel's product portfolios as part of the Advanced Design Group.

Salary

Base: $190,610.00-269,100.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, and vacation

Skills & Requirements

Must-have

  • Package and Disaggregation Architecture
  • Si, Package and Board co-design
  • Silicon Bridge/Interposer Architecture
  • Electrical analysis and simulation
  • Advanced design nodes
  • EDA partner collaboration

Nice-to-have

  • Self-motivated engineer
  • Strong analytical ability
  • Problem-solving skills
  • Work independently
  • Creative design approaches

Key Requirements

  • Bachelor's with 8+ years or Master's with 6+ years or PhD with 4+ years
  • 5+ years semiconductor fabrication and packaging
  • 6+ years Package, PCB design, or IC digital design
  • 5+ years design and electromagnetic simulation tools
  • 3+ years Cadence Allegro platform tools or Mentor Xpedition tools

Work Rights

Not specified

Tailored Resume

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