Physical Verification And Emir Signoff Lead

Samsung Semiconductor India Research (SSIR)

Physical verification (pv)
Emir (electromigration and ir drop)
Drc, lvs, erc, dfm, esd, antenna, perc
Own and execute "PV (Physical Verification)" and EMIR (Electromigration and IR drop) activities including DRC, LVS, ERC, DFM, ESD, Antenna, PERC, Static IR, Dynamic IR, Signal/Power EM, ESR and Jitter checks at chip, Subsystem and block level

Job Summary

  • Own and execute "PV (Physical Verification)" and EMIR (Electromigration and IR drop) activities including DRC, LVS, ERC, DFM, ESD, Antenna, PERC, Static IR, Dynamic IR, Signal/Power EM, ESR and Jitter checks at chip, Subsystem and block level.
  • Develop and manage automated verification flow and scripts in unix, perl, phyton and TCL for high quality and on-time tapeouts.
  • Collaborate closely in PD engineers, Design/DfT engineers, FNDRY, Package and Technology experts on PV and EMIR issues and sign-off challenges.

Matching Summary

Own and execute "PV (Physical Verification)" and EMIR (Electromigration and IR drop) activities including DRC, LVS, ERC, DFM, ESD, Antenna, PERC, Static IR, Dynamic IR, Signal/Power EM, ESR and Jitter checks at chip, Subsystem and block level.

Skills & Requirements

Must-have

  • Physical Verification (PV)
  • EMIR (Electromigration and IR drop)
  • DRC, LVS, ERC, DFM, ESD, Antenna, PERC
  • Static IR, Dynamic IR, Signal/Power EM
  • Calibre/ICV, Redhawk/Voltus, Innovus and FC tools
  • Unix, Perl, Python, TCL scripting

Nice-to-have

  • Technical leadership to juniors
  • Process and methodology improvements
  • Collaboration with PD, Design/DfT engineers

Key Requirements

  • 11 to 18 Years of experience
  • B.Tech/B.E/M.Tech/M.E degree
  • Experience with low technology nodes 8nm/5nm/3nm/2nm

Work Rights

Not specified

Tailored Resume

Cover Letter