Principal Dft Engineer

Alphawave Semi

Base salary influenced by qualifications; restrict...
Flexible work environment
12+ years experience in complex soc designs
Expertise with siemens snps cadence eda tools
Proficiency in verilog vhdl systemverilog
Alphawave Semi is seeking a Principal DFT Engineer to lead the development and support of design for test (DFT) methodologies across various projects. The ideal candidate should have extensive experience in complex SoC designs, DFT methodologies, and proficiency in related EDA tools

Job Summary

  • The role involves architecting integrated 'shift left' DFT environments across company IPs, ASICs, and SoC designs.
  • Candidates will be responsible for developing automated verification test benches and end-to-end verification solutions.
  • The company offers a flexible work environment with comprehensive benefits including health plans and stock purchase options.

Matching Summary

Match Score: 85

Alphawave Semi is seeking a Principal DFT Engineer to lead the development and support of design for test (DFT) methodologies across various projects. The ideal candidate should have extensive experience in complex SoC designs, DFT methodologies, and proficiency in related EDA tools.

Salary

Base salary influenced by qualifications; Restricted Stock Units (RSUs) available; Short-term incentive program and ESPP participation

Skills & Requirements

Must-have

  • 12+ years experience in complex SoC designs
  • Expertise with Siemens SNPS Cadence EDA tools
  • Proficiency in Verilog VHDL SystemVerilog
  • Deep knowledge of JTAG iJTAG BIST standards
  • Experience with scan insertion and ATPG procedures

Nice-to-have

  • Knowledge of TCL and Python scripting
  • Exposure to CAD and automation techniques
  • Experience with CoWoS Chip-On-Wafer-On-Substrate designs
  • Ability to develop custom RTL for DFT features

Key Requirements

  • Bachelor's degree in Engineering Science or Computer Engineering
  • 12+ years of experience in RTL, DFT, or Front End capacity
  • Extensive experience with main DFT standards like JTAG and BIST

Work Rights

Not specified

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