Soc Architect, Coherent Interconnect

Samsung Electronics

Austin, Texas, United States
Base: $180,200 - $297,200; bonus: mbo bonus compen...
Onsite
Soc architecture expertise
Coherent interconnect design
Cache coherence protocols
This role focuses on defining and implementing innovative, high-performance, and low-power interconnect solutions for Samsung's premium chipsets

Job Summary

  • This role focuses on defining and implementing innovative, high-performance, and low-power interconnect solutions for Samsung's premium chipsets.
  • The position requires deep expertise in cache subsystems, including the design of coherent caches and implementation of protocols like MESI and MOESI.
  • Samsung offers a comprehensive total rewards package including medical, dental, vision, 401(k), tuition assistance, and performance-based bonuses.

Matching Summary

This role focuses on defining and implementing innovative, high-performance, and low-power interconnect solutions for Samsung's premium chipsets.

Salary

Base: $180,200 - $297,200; Bonus: MBO bonus compensation based on performance; Benefits: Medical, dental, vision, life insurance, 401(k), onsite lunch, tuition assistance

Skills & Requirements

Must-have

  • SoC architecture expertise
  • Coherent interconnect design
  • Cache coherence protocols
  • Network-on-chip (NoC) designs
  • High-speed interface protocols
  • PPA optimization techniques

Nice-to-have

  • On-device ML for LLMs
  • Android ecosystem knowledge
  • Arm Architecture experience
  • Memory subsystem design
  • Global team collaboration

Key Requirements

  • 15+ years experience with Bachelor's degree
  • 13+ years experience with Master's degree
  • 11+ years experience with Ph.D
  • Proficiency in C, C++, Python, Verilog/VHDL
  • Ability to access export-controlled information

Work Rights

Must be eligible to access export-controlled information or have government authorization

Tailored Resume

Cover Letter