Performance Architect

Cadence

Austin, TX, United States
Arm-based systems
System-level performance modeling
Noc / fabric architectures
Define, analyze, and optimize performance across CPUs, interconnect, memory subsystems, and accelerators

Job Summary

  • Define, analyze, and optimize performance across CPUs, interconnect, memory subsystems, and accelerators.
  • Evaluate and optimize performance for heterogeneous workloads including NPU/AI, ISP, VISION, and I/O.
  • Build and maintain system-level performance models and perform workload-driven studies.

Matching Summary

Define, analyze, and optimize performance across CPUs, interconnect, memory subsystems, and accelerators.

Skills & Requirements

Must-have

  • ARM-based systems
  • System-level performance modeling
  • NoC / fabric architectures
  • Chiplet partitioning
  • Die-to-die interconnects
  • Workload-driven studies

Nice-to-have

  • Data-driven analysis
  • Technical leadership and mentorship
  • Cross-functional team collaboration

Key Requirements

  • 10+ years of experience in SoC, system, or performance architecture
  • Proven experience working on ARM-based systems
  • Deep understanding of computer architecture
  • Strong knowledge of ARM architecture and ecosystem
  • Solid understanding of interconnects and fabrics

Work Rights

Not specified

Tailored Resume

Cover Letter