Block level verification using uvm or directed methods
Silicon Laboratories International is seeking a Digital Engineer I to join their digital design team in Singapore. The ideal candidate will have experience in digital circuit design and integration, particularly within mixed-signal System-on-Chip (SoC) environments
Job Summary
The candidate will serve as a technical contributor developing highly integrated mixed-signal SoCs for low-power MCU and wireless products.
Responsibilities include designing block architecture, integrating digital blocks into SoC infrastructure, and performing verification with mixed-signal modeling.
Benefits include medical and dental insurance covering family members, bi-yearly health screenings, and an office location above Tai Seng MRT station.
Matching Summary
Match Score: 85
Silicon Laboratories International is seeking a Digital Engineer I to join their digital design team in Singapore. The ideal candidate will have experience in digital circuit design and integration, particularly within mixed-signal System-on-Chip (SoC) environments.
Skills & Requirements
Must-have
RTL coding for digital circuits
SoC integration and infrastructure development
Block level verification using UVM or directed methods
Nice-to-have
Low-power implementation experience
CortexM based system knowledge
Design for Testability skills like ATPG
Key Requirements
PhD/Master's in microelectronics or Bachelor's in electronics engineering
Minimum 2 years of related experience
Strong knowledge of ASIC design tools and methodologies