Ip Logic Design Engineer

Intel

Bangalore, India
Not specified; not specified; not specified
Hybrid
Pcie cxl ucie protocol architecture
Rtl design and systemverilog coding
High-speed io controller implementation
The role involves designing industry-leading x86 core and differentiated IPs to enhance product performance in Xeon, Networking, and AI platforms

Job Summary

  • The role involves designing industry-leading x86 core and differentiated IPs to enhance product performance in Xeon, Networking, and AI platforms.
  • Candidates must possess a unique blend of microarchitectural expertise and hands-on RTL coding skills to implement advanced Digital IO Controllers.
  • The position requires close collaboration with physical design, software, and firmware teams to ensure seamless integration of memory fabric systems.

Matching Summary

The role involves designing industry-leading x86 core and differentiated IPs to enhance product performance in Xeon, Networking, and AI platforms.

Salary

Not specified; Not specified; Not specified

Skills & Requirements

Must-have

  • PCIe CXL UCIe protocol architecture
  • RTL design and SystemVerilog coding
  • High-speed IO controller implementation
  • Memory coherency protocol design
  • STA and formal equivalence verification

Nice-to-have

  • Mentoring junior engineers
  • Workload modeling and optimization
  • Cross-functional collaboration skills
  • Debugging pre-silicon validation issues

Key Requirements

  • Bachelor's degree with 8-12+ years experience or Master's with 7-11+ years
  • Experience in FE RTL2Netlist methodology flows
  • Proficiency in STA and Formal Equivalence tools

Work Rights

Not specified

Tailored Resume

Cover Letter