Senior Physical Design Engineer

Analog Devices Foundation

Bangalore, India
End-to-end physical implementation
Floorplan development and optimization
Place-and-route and clock tree synthesis
Own end-to-end physical implementation for major IP blocks and/or full-chip designs, ensuring alignment with ADI’s Career Development Framework

Job Summary

  • Own end-to-end physical implementation for major IP blocks and/or full-chip designs, ensuring alignment with ADI’s Career Development Framework.
  • Collaborate with RTL, DFT, verification, package, and library teams to meet performance, power, and area (PPA) targets and project milestones.
  • Demonstrate ADI values by being agile in adapting to changing business needs, leading by example, and striving for best-in-class results.

Matching Summary

Own end-to-end physical implementation for major IP blocks and/or full-chip designs, ensuring alignment with ADI’s Career Development Framework.

Skills & Requirements

Must-have

  • End-to-end physical implementation
  • Floorplan development and optimization
  • Place-and-route and clock tree synthesis
  • Static timing analysis (STA)
  • Physical verification (DRC/LVS/ERC)
  • Automate design flows
  • Cadence Innovus tool proficiency

Nice-to-have

  • Hierarchical design experience
  • Low power design methodologies
  • Multi-voltage design methodologies
  • Agile adaptation to business needs
  • Mentoring and coaching junior engineers

Key Requirements

  • 5+ years ASIC/SoC physical design experience
  • Bachelor’s or Master’s in Electrical/Electronics Engineering
  • Experience with automated flows (Tcl, Perl, Python)
  • Deep understanding of fabrication process limitations
  • Ability to communicate clearly and collaborate cross-functionally

Work Rights

Not specified

Tailored Resume

Cover Letter