Lead Physical Design Engineer

NXP Semiconductors

Bangalore, India
Rtl synthesis to gds implementation
Floor planning, placement, cts, routing
Timing convergence (sta)
The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design, from RTL synthesis to GDS implementation and optimization

Job Summary

  • The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design, from RTL synthesis to GDS implementation and optimization.
  • Responsibilities include floor planning, power planning, place and route, clock tree synthesis, static timing analysis (STA), physical verification, and power integrity analysis.
  • The role requires collaboration with design, verification, and DFT teams to ensure seamless integration and achieve project milestones.

Matching Summary

The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design, from RTL synthesis to GDS implementation and optimization.

Skills & Requirements

Must-have

  • RTL synthesis to GDS implementation
  • floor planning, Placement, CTS, routing
  • timing convergence (STA)
  • physical verification (DRC/LVS/Electromigration/IR drops)
  • EDA tools for physical design
  • deep sub-micron process technologies

Nice-to-have

  • Self-Starter with at-least 8 years
  • problem solving related to physical design
  • define best Physical design strategy
  • collaborative team environment
  • Good communication skills

Key Requirements

  • Minimum 8 years of experience
  • Bachelor's or Master's degree in Electronics Engineering
  • Proficiency with industry-standard EDA tools
  • Strong knowledge of Static Timing Analysis (STA)
  • Experience with scripting languages (Tcl, Perl, or Python)

Work Rights

Not specified

Tailored Resume

Cover Letter