Indclutch is seeking a Logic Design Engineer to develop and optimize mixed-signal and high-speed IPs for full-chip designs. The ideal candidate should have experience with RTL coding, logic design, and various programming languages, and will work remotely from New Delhi, India
Job Summary
Altera delivers cutting-edge FPGA, CPLD, and IP technologies, driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure.
Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems.
Involve in IP design example brings up on hardware, hardware verification and failure debugging.
Matching Summary
Match Score: 85
Indclutch is seeking a Logic Design Engineer to develop and optimize mixed-signal and high-speed IPs for full-chip designs. The ideal candidate should have experience with RTL coding, logic design, and various programming languages, and will work remotely from New Delhi, India.