Senior Sta Engineer

NXP Semiconductors

Bangalore, India
Synthesis flow setup and flows
Genus flows
Sta flow setup and flows
The Digital Physical Design Engineer is responsible for a physical implementation of IP, Subsystem or IC design

Job Summary

  • The Digital Physical Design Engineer is responsible for a physical implementation of IP, Subsystem or IC design.
  • The individual is responsible from RTL synthesis setup, flow cleanup, run multiple experiments to get the best Area, timing and Power, Post-Scan Synthesis netlist STA timing checks, LEC flow setup and cleanup, timing convergence (STA) including related design and timing ECO and should be able to understand the constraints and suggest constraints to Design/DFT teams.
  • The individual contributes to problem solving related to physical design.

Matching Summary

The Digital Physical Design Engineer is responsible for a physical implementation of IP, Subsystem or IC design.

Skills & Requirements

Must-have

  • Synthesis Flow setup and flows
  • Genus flows
  • STA flow setup and flows
  • Tempus flows
  • STA timing ECOs
  • Constraints and clocks

Nice-to-have

  • excellent communication skills
  • team player
  • problem solving related to physical design
  • define best Physical design strategy

Key Requirements

  • 4-7 years experience
  • Good in Synthesis Flow setup
  • Worked on Genus flows
  • Good in STA flow setup
  • Worked in Tempus flows
  • Worked on STA timing ECOs across multiple technology nodes

Work Rights

Not specified

Tailored Resume

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