Asic/fpga Verification Engineer - (associate, Experienced, Or Lead) - Socal

Boeing Co

El Segundo, CA, USA
Associate: $85,850 - $116,150; experienced: $104,5...
Not specified (likely hybrid or onsite based on location)
Systemverilog and uvm proficiency
Self-checking reusable test bench design
Functional and code coverage analysis
Boeing is seeking multiple ASIC/FPGA Verification Engineers at various experience levels (Associate, Experienced, or Lead) for their Electronic Products team in Southern California. The role involves designing and implementing verification environments for complex digital systems, focusing on both aerospace and commercial applications. Candidates should have a strong background in ASIC/FPGA verification, familiarity with SystemVerilog/UVM, and a passion for high-tech engineering

Job Summary

  • The role involves developing state-of-the-art digital ICs and SoCs for critical Boeing programs in space, avionics, and weapons systems.
  • Engineers will utilize leading-edge tools to build robust verification environments using UVM and SystemVerilog with a focus on high-integrity flight computers.
  • Boeing offers competitive compensation packages, relocation assistance, and opportunities to work across diverse business units including Space & Launch and AvionX.

Matching Summary

Match Score: 85

Boeing is seeking multiple ASIC/FPGA Verification Engineers at various experience levels (Associate, Experienced, or Lead) for their Electronic Products team in Southern California. The role involves designing and implementing verification environments for complex digital systems, focusing on both aerospace and commercial applications. Candidates should have a strong background in ASIC/FPGA verification, familiarity with SystemVerilog/UVM, and a passion for high-tech engineering.

Salary

Associate: $85,850 - $116,150; Experienced: $104,550 - $141,450; Lead: $126,650 - $171,350; Variable compensation available

Skills & Requirements

Must-have

  • SystemVerilog and UVM proficiency
  • Self-checking reusable test bench design
  • Functional and code coverage analysis
  • Object-oriented programming principles
  • Linux environment experience

Nice-to-have

  • Palladium hardware emulator experience
  • High-speed Serdes interface knowledge
  • Space-based design techniques
  • Python or Perl scripting skills
  • First pass ASIC success history

Key Requirements

  • Bachelor's degree in Engineering or Computer Science
  • 2+ years experience for Associate level
  • 5+ years experience for Experienced level
  • 10+ years experience for Lead level
  • U.S. Citizenship required for security clearance

Work Rights

Must have US citizenship

Tailored Resume

Cover Letter